The present invention relates to a method of making surfaces of processed products smooth, and particularly to a method of making surfaces of semiconductor devices smooth by filling concavities of uneven surfaces of semiconductor devices with an insulating film material.
Abrasive techniques have been so far used as one of techniques for processing the surface of optical glass. In the field of semiconductor devices, abrasive techniques have been used to make the surface of substrate become mirror finished. Recently, when the surface of interlayer insulators in the process of forming a multilayer interconnection is made smooth, abrasive techniques are applied to make the surface of substrate smooth after a buried insulating film is formed in the trench isolation. In the isolation process, in particular, since the size of a device isolation region that can be realized by a prior-art selection oxide film is limited, the trench isolation using abrasive techniques is indispensable for the planarization process of the surface of the semiconductor devices.
As a method of forming a trench isolation using an abrasive technique for making the surface of semiconductor device smooth, there has been proposed a method (see JP-A-6-295908 laid-open on Oct. 21, 1994) in which a first stopper layer is formed on the surface of convex portions of a semiconductor substrate having concavities and convexities on its surface, a buried insulating film is deposited on the concavities of the surface of the substrate, a second stopper layer is selectively formed on the surface of the concavities of the buried insulating film and the above-mentioned buried insulating film is removed until the surface of the first stopper layer is exposed by the planarization abrasive technique.
Also, in order to make the surface of the substrate become smoother, there are known techniques disclosed in JP-A-7-263537 laid-open on Oct. 13, 1995 and JP-A-8-8218 laid-open on Jan. 12, 1996.
The inventors of the present application obtained the following knowledge after researches and examinations.
When the uneven surface of the semiconductor substrate is made smooth by the planarization abrasive technique, it is to be appreciated that a focusing margin required by the next photolithography process is progressively reduced in accordance with the microminituarization.
According to an example of planarization methods that have been implemented by the inventors of the present application, as shown in FIGS. 2a to 2f, an interlayer insulator 205 is deposited on concavities and convexities 202, 203, 204 (FIG. 2a) of the surface of a semiconductor substrate 201 (FIG. 2b). Then, after a resist film 206 is formed and processed by patterning, a polished interlayer insulator (205) on a relatively large convex portion 204 is etched in advance by photolithography and dry etching (FIGS. 2c to 2e).
When the surface of the semiconductor substrate is made smooth by dry etching and chemical mechanical polishing, as shown in FIG. 3a, corner portions 306 are left on the peripheral portion of the convex portion of the semiconductor substrate so that, as shown in FIG. 3c, polishing slurries 310 are collected between a region surrounded by the corners 306 and a polishing pad 309, thereby resulting in an etching rate of this region 305 being increased. There is then the risk that a surface 209 of the convex portion will be exposed as shown in FIG. 2f. FIG. 3b is a plan view of the polished surface.
The above-mentioned problem can be solved by using a semiconductor device manufacturing method shown in FIGS. 1a to 1f according to an aspect of the present invention. That is, after an interlayer insulator 105 is deposited on concave and convex structures 102, 103, 104 (FIG. 2a) formed on a semiconductor surface 101 (FIG. 1b), by using a conventional photolithography technique, the interlayer insulator 105 is etched to leave an interlayer insulator 107 (pillar) cyclically while an island-like or line-like resist 106 is left within the region of the wide convex portion 104 (FIGS. 1c, 2d). Here, the size and interval of the pillar are changed with the area of the convex portion. When the surface of the semiconductor substrate is processed by chemical mechanical polishing; polishing slurries can be suppressed from being collected in the region surrounded by corners 108. Therefore, it is possible to control the excessive etching in a polished region 109 of the convex portion (FIGS. 1e, 1f).